Watchdoggo

This commit is contained in:
2017-05-16 10:01:08 +02:00
parent 601324b2a4
commit 191c10327f
6 changed files with 1110 additions and 961 deletions

View File

@@ -127,23 +127,17 @@ namespace PIC_Simulator.PIC
public uint TaktgeberAdresse = 0;
public uint TaktgeberBitnummer = 0;
public PICTimer Zaehler;
public PICWatchDog WatchDog;
public PICProgramm()
{
Zaehler = new PICTimer(this);
WatchDog = new PICWatchDog(this);
// Anfangswerte
SetRegisterOhneBank(ADDR_PCL, 0x00);
SetRegisterOhneBank(ADDR_STATUS, 0x18);
SetRegisterOhneBank(ADDR_PCLATH, 0x00);
SetRegisterOhneBank(ADDR_INTCON, 0x00);
SetRegisterOhneBank(ADDR_OPTION, 0xFF);
SetRegisterOhneBank(ADDR_TRIS_A, 0x1F);
SetRegisterOhneBank(ADDR_TRIS_B, 0xFF);
SetRegisterOhneBank(ADDR_EECON1, 0x00);
SetRegisterOhneBank(ADDR_EECON2, 0x00);
PCCounter = 0;
Reset();
}
public void Laden(string code)
@@ -237,7 +231,7 @@ namespace PIC_Simulator.PIC
}
}
if (IsSleeping) return false;
if (IsSleeping) { WatchDog.Aktualisieren(1, frequenz); return false;}
uint cycleCount = 1;
@@ -664,7 +658,17 @@ namespace PIC_Simulator.PIC
// of the WDT. Status bits TO and PD are
// set.
//TODO
WatchDog.Reset();
if (GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PSA))
{
SetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PS0, false);
SetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PS1, false);
SetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PS2, false);
}
SetRegisterOhneBank(ADDR_STATUS, STATUS_BIT_TO, true);
SetRegisterOhneBank(ADDR_STATUS, STATUS_BIT_PD, true);
}
else if (aktueller_befehl.befehl == GOTO)
{
@@ -795,103 +799,13 @@ namespace PIC_Simulator.PIC
PCCounter++;
Stepcount++;
TimerBerechnen(cycleCount);
Zaehler.TimerBerechnen(cycleCount);
WatchDog.Aktualisieren(cycleCount, frequenz);
return PCCounter >= befehle.Count;
}
private bool prev_RA4 = false;
private void TimerBerechnen(uint cycles)
{
bool tmr_mode = GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_T0CS);
bool edge_mode = GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_T0SE);
if (!tmr_mode)
{
bool curr_A4 = GetRegisterOhneBank(ADDR_PORT_A, 4);
if (edge_mode)
{
if (prev_RA4 && !curr_A4)
{
TimerHochzaehlen(cycles);
}
}
else
{
if (!prev_RA4 && curr_A4)
{
TimerHochzaehlen(cycles);
}
}
}
else
{
TimerHochzaehlen(cycles);
}
prev_RA4 = GetRegisterOhneBank(ADDR_PORT_A, 4);
}
private uint prescale_cntr = 0; // Zähler für timer
private void TimerHochzaehlen(uint cycles)
{
uint current = GetRegisterOhneBank(ADDR_TMR0);
uint scale = BerechneVorskalierung();
prescale_cntr += cycles;
while (prescale_cntr >= scale)
{
prescale_cntr -= scale;
uint Result = current + 1;
if (Result > 0xFF)
{
//TODO Interrupt PIT_TIMER
}
Result %= 0x100;
uint tmp_psc = prescale_cntr;
SetRegisterOhneBank(ADDR_TMR0, Result);
prescale_cntr = tmp_psc;
}
}
private uint BerechneVorskalierung()
{
bool prescale_mode = GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PSA);
uint scale = 0;
scale += GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PS2) ? 1U : 0U;
scale *= 2;
scale += GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PS1) ? 1U : 0U;
scale *= 2;
scale += GetRegisterOhneBank(ADDR_OPTION, OPTION_BIT_PS0) ? 1U : 0U;
return prescale_mode ? 1 : (SHL(2, scale));
}
private uint UIntPower(uint x, uint power)
{
if (power == 0)
return 1;
if (power == 1)
return x;
// ----------------------
int n = 15;
while ((power <<= 1) >= 0)
n--;
uint tmp = x;
while (--n > 0)
tmp = tmp * tmp *
(((power <<= 1) < 0) ? x : 1);
return tmp;
}
public void SetRegisterOhneBank(uint index, uint wert)
{
// register die nur einmal auf bank1 + 2 existieren
@@ -1043,5 +957,29 @@ namespace PIC_Simulator.PIC
return (byte)(bit ? (val | SHL(1, pos)) : (val & ~SHL(1, pos)));
}
public void Reset()
{
Register = new byte[0x100];
Latch_RA = 0;
Latch_RB = 0;
Register_W = 0;
Stack.Clear();
SetRegisterOhneBank(ADDR_PCL, 0x00);
SetRegisterOhneBank(ADDR_STATUS, 0x18);
SetRegisterOhneBank(ADDR_PCLATH, 0x00);
SetRegisterOhneBank(ADDR_INTCON, 0x00);
SetRegisterOhneBank(ADDR_OPTION, 0xFF);
SetRegisterOhneBank(ADDR_TRIS_A, 0x1F);
SetRegisterOhneBank(ADDR_TRIS_B, 0xFF);
SetRegisterOhneBank(ADDR_EECON1, 0x00);
SetRegisterOhneBank(ADDR_EECON2, 0x00);
PCCounter = 0;
}
}
}